The IBM patented self-assembly process moves a nanotechnology manufacturing method that had shown promise in laboratories into a commercial manufacturing environment for the first time, providing the equivalent of two generations of Moore's Law wiring performance improvements in a single step, using conventional manufacturing techniques.
This new form of insulation, commonly referred to as "airgaps" by scientists, is a misnomer, as the gaps are actually a vacuum, absent of air. The technique deployed by IBM causes a vacuum to form between the copper wires on a computer chip, allowing electrical signals to flow faster, while consuming less electrical power. The self-assembly process enables the nano-scale patterning required to form the gaps; this patterning is considerably smaller than current lithographic techniques can achieve.
A vacuum is believed to be the ultimate insulator for what is known as wiring capacitance, which occurs when two conductors, in this case adjacent wires on a chip, sap or siphon electrical energy from one another, generating undesirable heat and slowing the speed at which data can move through a chip.
Until now, chip designers often were forced to fight capacitance issues by pushing ever more power through chips creating, in the process, a range of other problems. They have also used insulators with better insulating capability, but these insulators have become tenuously fragile as chip features get smaller and smaller, and their insulating properties do not compare to those of a vacuum.
The self-assembly process already has been integrated with IBM's state-of-the-art manufacturing line in East Fishkill, New York and is expected to be fully incorporated in IBM's manufacturing lines and used in chips in 2009. The chips will be used in IBM's server product lines and thereafter for chips IBM builds for other companies.
"This is the first time anyone has proven the ability to synthesize mass quantities of these self-assembled polymers and integrate them into an existing manufacturing process with great yield results," said Dan Edelstein, IBM Fellow and chief scientist of the self- assembly airgap project. "By moving self assembly from the lab to the fab, we are able to make chips that are smaller, faster and consume less power than existing materials and design architectures allow."
Edelstein led the IBM team that invented the technique to use copper wiring in computer chips instead of aluminum, now a standard method for producing chips, ushering in a decade of chip innovations from the IBM labs that transformed how chips were built and used across many industries and applications.
The Secret of Self Assembly
The secret of IBM's breakthrough lies in how the IBM scientists moved the self-assembly process from the laboratory to a production manufacturing environment in a way that can potentially yield millions of chips with consistent, high performance results.
Today, chips are manufactured with copper wiring surrounded by an insulator, which involves using a mask to create circuit patterns by beaming light through the mask and later chemically removing the parts that are not needed.
The new technique to make airgaps by self-assembly skips the masking and light-etching process. Instead IBM scientists discovered the right mix of compounds, which they pour onto a silicon wafer with the wired chip patterns, then bake it.
This patented process provides the right environment for the compounds to assemble in a directed manner, creating trillions of uniform, nano-scale holes across an entire 300 millimeter wafer. These holes are just 20 nanometers in diameter, up to five times smaller than would be possible using today's most advanced lithography technique.
Once the holes are formed, the carbon silicate glass is removed, creating a vacuum between the wires -- know as the airgap -- allowing the electrical signals to either flow 35 percent faster, or the chips can consume 15 percent less energy.
Self assembly is a concept scientists have been studying at IBM and in labs around the world as a potential technique to create materials useful for building computer chips. The concept occurs in nature every day: it is how enamel is formed on our teeth, it's the process that creates seashells and it's what transforms water into complex snowflakes. The major difference is, while the processes that occur in nature are all unique, IBM has been able to direct the self-assembly process to form trillions of holes that are all similar.
This new technology can be incorporated into any standard CMOS manufacturing line, without disruption or new tooling. The self assembly process was jointly invented between IBM's Almaden Research Center in San Jose, California and the T.J. Watson Research Center in Yorktown, New York. The technique was perfected for future commercial production at the College of Nanoscale Science and Engineering of the University at Albany, within the world-class Albany NanoTech facilities, a research and development site in Albany, New York with strong ties to IBM, and at IBM's Semiconductor Research and Development Center in East Fishkill, N.Y.
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About CNSE. The UAlbany CNSE is the first college in the world dedicated to research, development, education, and deployment in the emerging disciplines of nanoscience, nanoengineering, nanobioscience, and nanoeconomics. In May 2006, it was ranked as the nation's number one college for nanotechnology and microtechnology in the Annual College Ranking by Small Times magazine. CNSE's Albany NanoTech complex is the most advanced research facility of its kind at any university in the world: a $3.5 billion, 450,000-square-foot complex that attracts corporate partners from around the world and offers students a one-of-a-kind academic experience. CNSE houses the only fully-integrated, 300mm wafer, computer chip pilot prototyping and demonstration line within 65,000 square feet of Class 1 capable cleanrooms. Over 1,600 scientists, researchers, engineers, students, and faculty work on site at CNSE's Albany NanoTech complex, including IBM, AMD, SONY, Toshiba, Qimonda, Honeywell, ASML, Applied Materials, Tokyo Electron, and Freescale. An expansion currently underway will increase the size of CNSE's Albany NanoTech complex to over 750,000 square feet, including over 80,000 square feet of Class 1 cleanroom space, to house over 2,000 scientists, researchers, engineers, students, and faculty by the end of 2008. For more information, visit http://www.cnse.albany.edu/.
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